Design and optimization of high voltage (HV) drain extended FinFET transistors for analog SoC applications
Source
Indian Institute of Technology, Gandhinagar
Date Issued
2020-01-01
Author(s)
Pal, Priyanjana
Subjects
18250024
Electrical Engineering
Sub-micron CMOS Technology
Drain-extended FinFET (DeFinFET)
High Voltage Devices
Planar MOSFETs
