Architecting fast and energy-efficient hardware accelerators for emerging ML workloads using hardware-software co-design
Source
Indian Institute of Technology, Gandhinagar
Date Issued
2024-01-01
Author(s)
Issac, Tom Glint
Subjects
Deep Neural Networks (DNN)
Conventional Hardware Accelerators (CHA)
Processing In Memory (PIM)
Near Data Processors (NDP)
Artificial Intelligence