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  4. FPCAm: Floating point configurable approximate multiplier for error resilient applications
 
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FPCAm: Floating point configurable approximate multiplier for error resilient applications

Source
Proceedings - IEEE International Symposium on Circuits and Systems
Author(s)
C.K., Jha, Chandan Kumar
S., Walia, Sumit
G., Kanojia, Gagan
J., Mekie, Joycee  
DOI
10.1109/ISCAS51556.2021.9401341
Volume
2021-May
Abstract
In this paper, we propose the design of a power-efficient floating point configurable approximate multiplier (FPCAM) suitable for error resilient applications. FPCAM allows systematic approximation, and the amount of approximation can be configured at run-time, depending on the error-tolerance of the applications. We show that compared to the existing state of the art multipliers, FPCAM on average consumes 62% lesser power and has 69% less power delay product. FPCAM also has 66% less area as compared to state of the art approximate multipliers. We have analyzed FPCAM for three different multimedia applications and random inputs to show that we achieve similar output quality as compared to existing multipliers while benefiting in power, area, and power delay product. � 2021 Elsevier B.V., All rights reserved.
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URI
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85109016828&doi=10.1109%2FISCAS51556.2021.9401341&partnerID=40&md5=f30dc451cfbf4a90f367f37fbf4824d2
https://d8.irins.org/handle/IITG2025/29369
Keywords
Errors
Error tolerance
Error-resilient
Floating points
Multimedia applications
Output quality
Power delay product
Power efficient
State of the art
Digital arithmetic
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