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  4. HyCMAx: Power-Efficient Hybrid CMOS-Memristor Based Approximate Dividers for Error-Resilient Applications
 
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HyCMAx: Power-Efficient Hybrid CMOS-Memristor Based Approximate Dividers for Error-Resilient Applications

Source
Proceedings of the IEEE International Conference on VLSI Design
ISSN
10639667
Date Issued
2025-01-01
Author(s)
Pokharia, Monika
Trivedi, Het
Doshi, Siddharth
Hegde, Ravi S.  
Mekie, Joycee  
DOI
10.1109/VLSID64188.2025.00092
Abstract
Approximate computing is a promising paradigm for improving the performance parameters of electronic systems at the expense of accuracy in error-resilient tasks such as multimedia processing, image multiplication, and neural networks. While approximate circuits utilizing CMOS technology have been extensively studied, integrating approximate computing with emerging technologies like memristors offers further performance enhancements. HyCMAx investigates a hybrid CMOS-memristor approach for designing approximate circuits. In this paper, an approximate subtractor has been proposed, which was subsequently used to implement a restoring divider using the hybrid CMOS-memristor approach. HyCMAx dividers implemented in 28nm CMOS technology node gave up to 43.8% dynamic power reduction and 31.3% transistor count reduction as compared to only-CMOS implementation. Different levels of approximation were introduced in the divider to study the limits of approximation, which would give acceptable results. The proposed designs were then evaluated in the context of neural networks and image processing applications. This study highlights the potential of combining CMOS and memristor technologies to create high-performance, power-efficient approximate circuits suitable for various error-resilient computational tasks.
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URI
https://d8.irins.org/handle/IITG2025/28292
Subjects
approximate subtractor | hybrid-CMOS memristor | image processing | neural networks | restoring divider
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