Effect of channel dimensions and spacer material on drain saturation voltage (VDS,SAT ) of sub-10nm Wf in regime FinFETs
Source
Indian Institute of Technology, Gandhinagar
Date Issued
2021-01-01
Author(s)
Sharma, Pratik
Subjects
19210091
Electrical Engineering
Electron Devices
MOS Transistor
Solid-State Electronics
Microelectronics
VLSI Systems