Low-cost, CMOS integrable Step Field Plate RF LDMOS Transistor with Low IM3 Distortion and High Drain Efficiency

Patel, RutuRutuPatelMohapatra, Nihar R.Nihar R.Mohapatra2025-08-312025-08-312022-01-01[9781665421775]10.1109/EDTM53872.2022.97983612-s2.0-85133972037https://d8.irins.org/handle/IITG2025/26264In this work, a CMOS integrable step field plate RF LDMOS transistor is proposed and analyzed. The proposed structure can be cost-effectively integrated to 180nm CMOS process with four additional masks. Compared to conventional (no field plate) LDMOS transistors, the proposed transistor has 2.6X better on-resistance (at same breakdown voltage), reduced nonlinear distortion, delayed power compression and increased power conversion efficiency.falseLow-cost, CMOS integrable Step Field Plate RF LDMOS Transistor with Low IM3 Distortion and High Drain EfficiencyConference Paper33-3520220cpConference Proceeding0