Bhoir, Mandar S.Mandar S.BhoirChiarella, ThomasThomasChiarellaMitard, JeromeJeromeMitardHoriguchi, NaotoNaotoHoriguchiMohapatra, Nihar RanjanNihar RanjanMohapatra2025-08-312025-08-312020-11-0110.1109/TED.2020.30257502-s2.0-85094872472https://d8.irins.org/handle/IITG2025/23939In this work, we have investigated the influence of ${V}_{\text {t}}$ extraction procedure on overall ${V}_{\text {t}}$ variability of sub-10 nm ${W}_{\text {fin}}$ FinFETs. Using six different ${V}_{\text {t}}$ extraction techniques, we have experimentally demonstrated that the ${V}_{\text {t}}$ variability is independent of ${V}_{\text {t}}$ extraction procedure (unlike reported earlier). Furthermore, through systematic evaluation on commonly used ${V}_{\text {t}}$ extraction techniques, the physics behind this anomalous behavior is investigated. It is shown that the significant variation in metal gate work-function and gate dielectric charges in advanced CMOS nodes is mainly responsible for this behavior. This claim is further validated for FinFETs with deeply scaled fin-width and effective oxide thickness (EOT).falseCMOS technology scaling | extraction methodology | FinFET | process-variability | threshold voltageV Extraction Methodologies Influence Process Induced v Variability: Does This Fact Still Hold for Advanced Technology Nodes?Article155796464691-4695November 202009216596arJournal0WOS:000584285700030