Chandrasekaran, S.S.ChandrasekaranRagavan, K.K.Ragavan2025-08-302025-08-302014-02-12[9781479963737]10.1109/PEDES.2014.70419742-s2.0-84946690151https://d8.irins.org/handle/IITG2025/21546Synchronous reference frame phase-locked loop (SRF PLL) is extensively employed for grid converter synchronization applications. When the input contains the fundamental positive sequence (FPS) component alone, it performs exceedingly well. However, with harmonic contamination and unbalance in the input, its performance degrades. For this purpose, many structural modifications are proposed. In this work, the sliding discrete Fourier transform (SDFT) is deployed as a pre-filter to the SRF PLL. However, under grid frequency drift, with fixed sampling frequency, the SDFT output becomes erroneous. To alleviate this problem, the sampling frequency is adaptively adjusted. Further, the unbalance in the input is dealt with the instantaneous symmetrical components method. Various grid fault scenarios are emulated with the help of dSPACE realtime controller board and the efficacy of the proposed scheme is demonstrated through experimental study.falseGrid synchronization | phase estimation | phase-locked loop | sliding DFTConference Paper12 February 2014117041974cpConference Proceeding7