K., Prasad, KailashPrasad, KailashK.A., Biswas, AdityaBiswas, AdityaA.A., Kabra, ArpitaKabra, ArpitaA.J., Mekie, JoyceeMekie, JoyceeJ.2025-09-012025-09-0197839810801629780769522883398108012297839810801179789783981089978398108097983503485909783981537024076952288297839810801861530159110.23919/DATE56975.2023.101373382-s2.0-85162652912https://www.scopus.com/inward/record.uri?eid=2-s2.0-85162652912&doi=10.23919%2FDATE56975.2023.10137338&partnerID=40&md5=6ad5ce75e1a548dc44d8e8a637146917https://d8.irins.org/handle/IITG2025/29397In-Memory Computing (IMC) is a promising approach to enabling energy-efficient Deep Neural Network-based applications on edge devices. However, analog domain dot product and multiplication suffers accuracy loss due to process variations. Furthermore, wordline degradation limits its minimum pulsewidth, creating additional non-linearity and limiting IMC's dynamic range and precision. This work presents a complete end-to-end process invariant capacitive multiplier based IMC in 6T-SRAM (PIC-RAM). The proposed architecture employs the novel idea of two-step multiplication in column-major IMC to support 4-bit multiplication. The PIC-RAM uses an operational amplifier-based capacitive multiplier to reduce bitline discharge allowing good enough WL pulse width. Further, it employs process tracking voltage reference and fuse capacitor to tackle dynamic and post-fabrication process variations, respectively. Our design is compute-disturb free and provides a high dynamic range. To the best of our knowledge, PIC-RAM is the first analog SRAM IMC approach to tackle process variation with a focus on its practical implementation. PIC-RAM has a high energy efficiency of about 25.6 TOPS/W for 4-bit� 4-bit multiplication and has only 0.5% area overheads due to the use of the capacitance multiplier. We obtain 409 bit-wise TOPS/W, which is about 2� better than state-of-the-art. PIC-RAM shows the TOP-1 accuracy for ResNet-18 on CIFAR10 and MNIST is 89.54% and 98.80% for 4bit�4bit multiplication. � 2023 Elsevier B.V., All rights reserved.EnglishCapacitanceDeep neural networksOperational amplifiersStatic random access storage6T-SRAM6T-SRAMsAccuracy lossAnalogue domainBit multiplicationDomain dotsEnergy efficientNetwork based applicationsProcess VariationPulsewidthsEnergy efficiencyConference paper20235