Patil, ShubhamShubhamPatilPandey, Adityanarayan H.Adityanarayan H.PandeyBhunia, SwagataSwagataBhuniaLashkare, SandipSandipLashkareLaha, ApurbaApurbaLahaDeshpande, VeereshVeereshDeshpandeGanguly, UdayanUdayanGanguly2025-08-312025-08-312024-10-1510.1016/j.tsf.2024.1405292-s2.0-85203802084https://d8.irins.org/handle/IITG2025/28701Silicon on Insulator (SOI) technology has been the promising solution for the On-chip low-power mixed-signal systems. However, the traditional smart-cut method for SOI wafer fabrication is costly. Hence, in this work, we present an optimized methodology to fabricate a wafer scale single-crystalline Si on epitaxial Gd<inf>2</inf>O<inf>3</inf>/Si(111) substrate (SOXI) using a low-cost, high volume manufacturable (HVM)-friendly Radio Frequency magnetron sputtering technique for SOI application. The grown Si and Gd<inf>2</inf>O<inf>3</inf> layers are physically characterized using high-resolution X-ray Diffraction and high-resolution Transmission Electron Microscopy (HRTEM). The Grazing Incidence X-ray Diffraction, Pole Figure, and HRTEM imaging confirm the formation of an epitaxial Top-Si layer on the epitaxial-Gd<inf>2</inf>O<inf>3</inf>/Si(111) substrate. Hence, we demonstrate a low-cost, HVM-friendly technique for the fabrication of SOXI wafers.falseEpitaxial thin film | Gadolinium oxide (Gd2O3) | Radio Frequency (RF) Sputtering | Rapid thermal annealing | Silicon on InsulatorArticle15 October 20240140529arJournal0WOS:001317466000001