Sample plan selection techniques for lithography process model building

The reduction of measurement data and the reduction of time required to select the sample plan are essential for the development of an efficient lithography process model. We have discussed the strengths and weaknesses of existing sample plan selection techniques and proposed a locally linear embedding (LLE)-based sample selection technique. The proposed approach significantly reduces the demand for metrology data and improves the modeling turn-around time without sacrificing the model accuracy and stability. The effectiveness of the proposed methodology is verified by modeling pattern transfer process of critical layers in 14- and 22-nm complementary metal-oxide-semiconductor technologies. The experimental results show that among different sample plan selection techniques, the LLE provides a competitive sample plan choice in a single shot without compromising the accuracy.