Low-cost, CMOS integrable Step Field Plate RF LDMOS Transistor with Low IM3 Distortion and High Drain Efficiency

In this work, a CMOS integrable step field plate RF LDMOS transistor is proposed and analyzed. The proposed structure can be cost-effectively integrated to 180nm CMOS process with four additional masks. Compared to conventional (no field plate) LDMOS transistors, the proposed transistor has 2.6X better on-resistance (at same breakdown voltage), reduced nonlinear distortion, delayed power compression and increased power conversion efficiency.