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  4. Compact Modeling of LDMOS Transistors Over a Wide Temperature Range Including Cryogenics
 
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Compact Modeling of LDMOS Transistors Over a Wide Temperature Range Including Cryogenics

Source
IEEE Transactions on Electron Devices
ISSN
00189383
Date Issued
2024-01-01
Author(s)
MacHhiwar, Yogendra
Gill, Garima
Kaushal, Kumari Neeraj
Mohapatra, Nihar R.  
Agarwal, Harshit
DOI
10.1109/TED.2023.3326107
Volume
71
Issue
1
Abstract
An improved compact model of high-voltage laterally diffused MOS (LDMOS) transistors valid over a wide temperature range including cryogenic is presented. The existing BSIM-BULK HV compact model is improved to include carrier freeze-out and field-assisted ionization models, which are key for the HV devices. In addition, temperature dependence of mobility, flat-band voltage, and saturation velocity models are also improved for application to cryogenic temperatures. The proposed model is implemented within the framework of the BSIM-BULK HV compact model and shows excellent capability in modeling experimental LDMOS transistor data for temperatures between 300 and 77 K.
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URI
https://d8.irins.org/handle/IITG2025/29165
Subjects
BSIM-BULK | carrier freeze-out | complementary metal-oxide-semiconductor (CMOS) | cryogenic | laterally diffused MOS (LDMOS) | semiconductor device modeling
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