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  4. Surrogate models for device design using sample-efficient Deep Learning
 
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Surrogate models for device design using sample-efficient Deep Learning

Source
Solid State Electronics
ISSN
00381101
Date Issued
2023-01-01
Author(s)
Patel, Rutu
Mohapatra, Nihar R.  
Hegde, Ravi S.  
DOI
10.1016/j.sse.2022.108505
Volume
199
Abstract
Generation of training dataset for machine learning-based device design algorithm is expensive. To address this, we propose an active learning approach. Its efficiency is demonstrated through a Deep Neural Network (DNN) based Laterally Diffused Metal Oxide Semiconductor Field-effect Transistor (LDMOSFET) off-state breakdown voltage (BV<inf>DS,off</inf>) and specific on-resistance (R<inf>sp</inf>) predictor. Our results show the possibility of ∼50% reduction in the training dataset size without compromising the baseline accuracy. Specifically, we compared eight sampling techniques and found that Informative-Query by Committee (I-QBC) and Diverse Informative-Greedy Sampling (DI-GS) techniques work best with ∼1.87% Euclidean Norm of Prediction Error (ENPE).
Unpaywall
URI
https://d8.irins.org/handle/IITG2025/25783
Subjects
Active learning | Deep Neural Networks | LDMOSFET | Off-state breakdown voltage | Specific on resistance
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