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  4. Field programmable gate array based speed control of BLDC motor
 
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Field programmable gate array based speed control of BLDC motor

Source
Proceedings of the 2015 IEEE Innovative Smart Grid Technologies Asia Isgt Asia 2015
Date Issued
2016-01-19
Author(s)
Pindoriya, Rajesh M.
Rajendran, S.  
Chauhan, P. J.
DOI
10.1109/ISGT-Asia.2015.7387048
Abstract
This paper demonstrates the Field Programmable Gate Arrays (FPGAs) of design methodologies with a focus on motor drive applications. Motor is the heart of many industrial automation and motion/drive control applications, but major problem arise in controlling the speed of the motor. Brushless DC (BLDC) motor is new and reliable motor because it has high efficiency, high torque to power ratio, lower maintenance due to brushless architecture and compact size, etc. This work presents FPGAs implementation for PWM based speed control of inverter-fed BLDC motor. The proposed methodology is first simulated for open loop and closed loop speed control. These simulation results are further verified through lab scale experimental set up. It has been observed that FPGAs based closed loop method improves the transient and steady state response in speed control of BLDC motor.
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URI
https://d8.irins.org/handle/IITG2025/21968
Subjects
Brushless DC (BLDC) motor | field programmable gate arrays (FPGAs) | intelligent power module (IPM) and speed control
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