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  2. IIT Gandhinagar
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  4. Synchronous to asynchronous conversion for non-linear pipelined processor
 
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Synchronous to asynchronous conversion for non-linear pipelined processor

Source
Indian Institute of Technology, Gandhinagar
Date Issued
2021-01-01
Author(s)
Shah, Smit
URI
https://d8.irins.org/handle/IITG2025/32266
Subjects
19210108
Electrical Engineering
Processor Designs
Nuclear Science
Asynchronous Circuits
Asynchronous VLSI
Soft Error
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