Repository logo
  • English
  • العربية
  • বাংলা
  • Català
  • Čeština
  • Deutsch
  • Ελληνικά
  • Español
  • Suomi
  • Français
  • Gàidhlig
  • हिंदी
  • Magyar
  • Italiano
  • Қазақ
  • Latviešu
  • Nederlands
  • Polski
  • Português
  • Português do Brasil
  • Srpski (lat)
  • Српски
  • Svenska
  • Türkçe
  • Yкраї́нська
  • Tiếng Việt
Log In
New user? Click here to register.Have you forgotten your password?
  1. Home
  2. Scholalry Output
  3. Publications
  4. The design of ultra low power sar adc for Implantable Cardioverter Defibrillator (ICD)
 
  • Details

The design of ultra low power sar adc for Implantable Cardioverter Defibrillator (ICD)

Source
Proceedings 33rd International Conference on VLSI Design Vlsid 2020 Held Concurrently with 19th International Conference on Embedded Systems
Date Issued
2020-01-01
Author(s)
Mohapatra, Satyajit
Mohapatra, Nihar Ranjan  
DOI
10.1109/VLSID49098.2020.00030
Abstract
The frontend Analog to Digital Converters (ADCs) consume substantial power in implanted biomedical devices such as cardiac defibrillators. Their energy efficiency primarily determines the lifetime of these miniaturized micro powered devices. In this work, the design and calibration of a 14-bit 10 KS/s SAR ADC using SCL 0.18\mu m2P4M CMOS processes is discussed. The designed ADC occupies a layout area of 2.4mm\times2.4mm and consumes \sim19\muw at 10 KS/s speed. It achieves an effective resolution (ENOB) of 13.84 bits with an energy Figure of merit (FOM) of 139 fJ/conversion. The design is verified at all process corners over the commercial temperature range (0-85{\circ}\mathrm{C}).
Unpaywall
URI
https://d8.irins.org/handle/IITG2025/24307
Subjects
Analog to Digital conversion | Capacitor Mismatch | Digital Calibrations | Energy Efficiency | Placement optimization
IITGN Knowledge Repository Developed and Managed by Library

Built with DSpace-CRIS software - Extension maintained and optimized by 4Science

  • Privacy policy
  • End User Agreement
  • Send Feedback
Repository logo COAR Notify